Describe one routed expert as a fixed aligned native slot without opening or
mapping any tensor payload.
The slot order is deliberately independent of safetensors header order:
down/gate/up packed weights followed by down/gate/up F32 scales. Every
pointer-addressed component begins at a 16 KiB boundary: MLX/Metal cannot
safely no-copy-wrap a merely sub-page-aligned host pointer. Source-adjacent
components still coalesce when the required padding is zero.
Describe one routed expert as a fixed aligned native slot without opening or mapping any tensor payload.
The slot order is deliberately independent of safetensors header order: down/gate/up packed weights followed by down/gate/up F32 scales. Every pointer-addressed component begins at a 16 KiB boundary: MLX/Metal cannot safely no-copy-wrap a merely sub-page-aligned host pointer. Source-adjacent components still coalesce when the required padding is zero.